Charge transfer devices are semiconductor devices which operate to store clumps of charge in localized regions of a semiconductor and to transfer the stored charge systematically from one region to another. A typical MOS charge transfer device consists of an array of metal electrodes overlayed on a dielectric layer which is itself deposited on a semiconductor substrate. The device operates by storing minority carriers in the semiconductor in localized regions under certain ones of the metal electrodes. In one type of device, commonly called an interface device, the charge is stored at the boundary between the oxide and the semiconductor substrate. In another type of device, called a bulk device, the stored charge is instead distributed in the semiconductor to some distance below the oxide-semiconductor interface. In both cases, the charge is localized by applying external voltages to the electrodes to create potential minima (potential wells) in the vicinity of the electrodes. By suitably varying the voltages on the different electrodes, the potential minima can be moved from one electrode to the next, thereby inducing a transfer of the stored charge from one region to another.
One potential application of these charge transfer devices is in the area of image sensing; minority carries are generated in the semiconductor in response to incident light, the charge thus generated being collected under the electrodes and transferred to a detector. Another potential application is to use the transfer device as an electronic delay line. Yet another potential application is to use charge transfer devices in a shift register mode to form a semiconductor computer memory. Each clump of stored charge (or the absence thereof) represents one bit of information.
For all of these applications, and especially for use as a computer memory, it is important that the charge transfer efficiency be very high. That is, when charge is transferred from the region beneath one electrode to the region beneath an adjacent electrode, a very large fraction (for example 99.9%) of the charge should be transferred. Otherwise, charge which is left behind will be subtracted from the charge comprising the transferred information bit, and added to the charge comprising the next adjacent bit. After a large number of transfers, the information in both bits will have been substantially degraded.
One of the ways known in the prior art to achieve efficient transfer is to employ a three-phase device in which every third electrode is connected in common. To store charge, external voltages are applied to the electrodes to create a deep potential well beneath every third electrode. Minority carriers in the semiconductor will be trapped and temporarily stored in these regions. To effect a transfer of charge, external voltages are applied to the electrodes in a three-phase timed sequence according to which another, deeper, potential well is created beneath the electrodes adjacent on one side to those electrodes under which charge may be currently stored. Under the influence of this deeper potential well, the charge stored under particular electrodes will be transferred to the regions beneath the above-mentioned adjacent electrodes. At the same time, the three-phase voltage operates to establish a very shallow potential well under the electrodes adjacent on the other side to those under which the charge (if any) was initially stored. This potential acts as a barrier to prevent charge from "spilling backwards." Thus, the three-phase structure serves to provide directionality to the charge transfer.
However, it is often desirable to provide directionality to the charge transfer without the complexities inherent in a three-phase system. This has been accomplished in the prior art by using a two-phase sytem in which external voltages are applied to the electrodes in a two-phase timed sequence beneath each electrode. Directionality of the charge transfer is provided by making the oxide layer non-uniform. In particular, if the oxide is thicker under one side of the electrode than the other, the variation in dielectric thickness will produce a variation in the potential strength under the electrode, so that the charge will be stored preferentially under one side of the electrode. To effect a charge transfer, the voltages on adjacent plates are pulsed to decrease the depth of the potential wells in which charge (if any) is currently stored, while simultaneously increasing the depth of the potential wells under the adjacent electrodes. Charge which was initially stored in the "deep" potential well (now "shallow") will be transferred to the adjacent potential well which is now "deep." FIGS. 1A-1B illustrate how the potential variation under each plate (caused by the non-uniform thickness of the oxide layer) acts to provide directionality to the charge transfer and thus prevent charge from slipping backwards. FIG. 1A shows the configuration of such a variable-thickness two-phase device in the storage mode. A voltage -V.sub.1 is applied to all of the odd-numbered electrodes, while another voltage -V.sub.2 (where V.sub.2 &gt; V.sub.1) is applied to the even-numbered electrodes. In this configuration, charge can be stored under any of the even-numbered electrodes. An oxide layer 5 is thicker under the left side of each electrode than under the right side, so that the potential well is deeper under the right side than under the left side of these electrodes. Charge will thus be stored under the right side. For example, in the figure, charge is stored under the right side of electrode 2 (representing a "1" bit of information), while no charge is stored under electrode 4 (representing a "o" bit of information). FIG. 1B shows the configuration of the device after the two-phase voltages on adjacent electrodes have been exchanged. The arrows indicate that the potential wells under the odd-numbered electrodes have increased in depth while those under the even-numbered electrodes have decreased in depth. Thus, the charge that was formally stored under electrode 2 will be spilled forward into the potential well under electrode 3. However, since the relative depths of the potential wells under the two halves of electrode are decreased in tandem, there will at all times be a "potential shoulder" under the left side of the electrode 2 which will prevent charge from slipping backwards to the region under electrode 1. In practice, it is difficult to design and manufacture multiple oxide thickness devices which achieve efficient charge transfer. Typically, for efficient transfer, one of the oxide thicknesses must be very much greater than the other, for example, thicknesses in the ratio of about 1:3 to 1:5. Furthermore, in order to manufacture the device, two separate steps are required to grow and etch the two oxide layers. Thus, it is often a complicated and expensive procedure to provide charge transfer directionality through the design and fabrication of multi-level oxide devices.
In accordance with the illustrated preferred embodiment, the present invention provides a two-phase charge transfer device using an array of electrodes overlayed on an insulating layer which is deposited on a semiconductor substrate. Directionality of the charge transfer is built-in by using electrodes which include a highly conductive part and another highly resistive part. When a two-phase voltage applied to the electrodes changes phase, the potential under the conductive part of each electrode follows almost instantaneously. But the resistive part of each electrode acts in conjunction with the oxide insulating layer as a distributed RC line which slows the rate of change of the potential in the region beneath the resistive part of the electrode. In effect, then, a single phase change in the voltage applied to each electrode generates an instantaneous change in one part of the potential well under that electrode, and also a delayed change in another part of that potential well. If the geometry is suitably chosen, the potential wells under adjacent electrodes will vary in such a way that charge is dumped from the region under one electrode to the region under the next adjacent electrode. The delayed change in part of the potential well creates a barrier which prevents charge from slipping backwards.
Another feature of the invention is that the charge transfer is self-correcting for losses of charge that occur when charge is transferred too rapidly into a region. In particular, the charge transfer frequency is dependent almost entirely on the RC time constant of the distributed RC line and not on the external clock frequency. Thus, when there is no charge in the region into which charge is to be transferred, the capacity (and hence the RC time constant) is small and the potential well changes rapidly, thereby inducing a rapid transfer of charge into the region. But, as charge builds up in the region, the capacity increases so that the shape of the potential well changes less rapidly. The rate of transfer of charge into the region is thus reduced. The rate of transfer of charge into the region is thus reduced. This self-correcting process ensures that charge will not be transferred into a previously charged region at a rate high enough to cause loss of charge. The efficiency of the devices is thereby increased.
It can be seen that the directionality of the charge transfer is achieved in the invention using only a single oxide layer of a uniform thickness. Since the resistivity of the electrodes can be varied by implanting impurity ions in the resitive layer, there is no additional masking step required during fabrication as is required in devices achieving directionality using a non-uniform oxide thickness.